| 書目名稱 | Test Generation of Crosstalk Delay Faults in VLSI Circuits |
| 編輯 | S. Jayanthy,M.C. Bhuvaneswari |
| 視頻video | http://file.papertrans.cn/904/903323/903323.mp4 |
| 概述 | Is intended for design engineers and researchers in the field of VLSI and embedded system design.Introduces readers to deterministic and simulation-based algorithms for testing crosstalk delay faults |
| 圖書封面 |  |
| 描述 | This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.. |
| 出版日期 | Book 2019 |
| 關(guān)鍵詞 | Crosstalk delay faults; Very Large Scale Integration; Deterministic Algorithms; Genetic Algorithm; Fuzzy |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-981-13-2493-2 |
| isbn_softcover | 978-981-13-4784-9 |
| isbn_ebook | 978-981-13-2493-2 |
| copyright | Springer Science+Business Media Singapore 2019 |
|Archiver|手機版|小黑屋|
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