| 書目名稱 | Rapid Reliability Assessment of VLSICs |
| 編輯 | A. P. Dorey,B. K. Jones,Y. Z. Xu |
| 視頻video | http://file.papertrans.cn/822/821217/821217.mp4 |
| 圖書封面 |  |
| 描述 | The increasing application of integrated circuits in situations where high reliability is needed places a requirement on the manufacturer to use methods of testing to eliminate devices that may fail on service. One possible approach that is described in this book is to make precise electrical measurements that may reveal those devices more likely to fail. The measurements assessed are of analog circuit parameters which, based on a knowledge of failure mechanisms, may indicate a future failure. . To incorporate these tests into the functional listing of very large scale integrated circuits consideration has to be given to the sensitivity of the tests where small numbers of devices may be defective in a complex circuit. In addition the tests ideally should require minimal extra test time. A range of tests has been evaluated and compared with simulation used to assess the sensitivity of the measurements. Other work in the field is fully referenced at the end of each chapter. The team at Lancaster responsible for this book wish to thank the Alvey directorate and SERe for the necessary support and encouragement to publish our results. We would also like to thank John Henderson, recently |
| 出版日期 | Book 1990 |
| 關鍵詞 | CMOS; Modulation; VLSI; analog; circuit; defects; diagnosis; integrated circuit; simulation |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4613-0587-3 |
| isbn_softcover | 978-1-4612-7879-5 |
| isbn_ebook | 978-1-4613-0587-3 |
| copyright | Plenum Press, New York 1990 |
|Archiver|手機版|小黑屋|
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