Titlebook: On-Chip Inductance in High Speed Integrated Circuits; Yehea I. Ismail,Eby G. Friedman Book 2001 Kluwer Academic Publishers 2001 CMOS.Count

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On the Extraction of On-Chip Inductance,hat the current return path can be distributed among many power and signal wires, some paths of which may be hundreds of micrometers away from the wire for which the inductance is being extracted [46], [50]-[57].

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Book 2001ayers, and performancerequirements are pushing the introduction of new materials for lowresistance interconnect, such as copper interconnect already used inmany commercial CMOS technologies. ..On-Chip Inductance in High Speed Integrated Circuits. deals withthe design and analysis of integrated circu

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er metal layers, and performancerequirements are pushing the introduction of new materials for lowresistance interconnect, such as copper interconnect already used inmany commercial CMOS technologies. ..On-Chip Inductance in High Speed Integrated Circuits. deals withthe design and analysis of integrated circu978-1-4613-5677-6978-1-4615-1685-9

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On-Chip Inductance in High Speed Integrated Circuits978-1-4615-1685-9

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Evaluating the Transient Response of Linear Networks,efly reviewed in this chapter. Simple methods to calculate the delay of signals in an . tree such as the Elmore delay [74] and Wyatt’s approximation [75] are introduced in section 3.1 since extensions to these methods for . trees are presented in subsequent chapters. The calculation of more accurate

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