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Titlebook: Languages and Compilers for Parallel Computing; 8th International Wo Chua-Huang Huang,Ponnuswamy Sadayappan,David Padua Conference proceedi

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11#
發(fā)表于 2025-3-23 12:49:35 | 只看該作者
Interprocedural analysis for parallelization, as precise as full inlining but without its associated costs. Experimentation with this system on programs from standard benchmark suites demonstrate that an integrated combination of interprocedural analyses can substantially advance the capability of automatic parallelization technology.
12#
發(fā)表于 2025-3-23 16:10:41 | 只看該作者
Optimizing Fortran 90 shift operations on distributed-memory multicomputers, data movement even when a definition of an array and its uses are separated by control flow. This technique supersedes those whose scope is restricted to a single statement. We focus on the application of this strategy on distributed-memory architectures, although it is more broadly applicable.
13#
發(fā)表于 2025-3-23 21:49:35 | 只看該作者
14#
發(fā)表于 2025-3-23 23:08:53 | 只看該作者
Parallel simulation of data parallel programs, on the IBM SPx using a conservative synchronization algorithm. This paper also describes the use of the simulator in evaluating the impact of architectural characteristics like processor speed and message communication latency on the performance of scientific applications including Gauss Jordan elimination and matrix multiplication.
15#
發(fā)表于 2025-3-24 03:48:20 | 只看該作者
16#
發(fā)表于 2025-3-24 09:03:19 | 只看該作者
17#
發(fā)表于 2025-3-24 10:56:35 | 只看該作者
18#
發(fā)表于 2025-3-24 18:40:30 | 只看該作者
Fast address sequence generation for data-parallel programs using integer lattices, basis vectors as a function of the mapping. Using the basis vectors, we derive a loop nest that enumerates the addresses, which are points in the lattice generated by the basis vectors. Experimental results show that our approach is better than that of a recent linear time solution to this problem.
19#
發(fā)表于 2025-3-24 23:04:14 | 只看該作者
20#
發(fā)表于 2025-3-25 02:55:11 | 只看該作者
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