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Titlebook: Interconnects in VLSI Design; Hartmut Grabinski Book 2000 Springer Science+Business Media Dordrecht 2000 Analysis.CMOS.FPGA.Field Programm

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發(fā)表于 2025-3-21 19:59:50 | 只看該作者 |倒序瀏覽 |閱讀模式
書目名稱Interconnects in VLSI Design
編輯Hartmut Grabinski
視頻videohttp://file.papertrans.cn/471/470696/470696.mp4
圖書封面Titlebook: Interconnects in VLSI Design;  Hartmut Grabinski Book 2000 Springer Science+Business Media Dordrecht 2000 Analysis.CMOS.FPGA.Field Programm
描述This book presents an updated selection of the most representative contributions to the 2nd and 3rd IEEE Workshops on Signal Propagation on Interconnects (SPI) which were held in Travemtinde (Baltic See Side), Germany, May 13-15, 1998, and in Titisee-Neustadt (Black Forest), Germany, May 19-21, 1999. This publication addresses the need of developers and researchers in the field of VLSI chip and package design. It offers a survey of current problems regarding the influence of interconnect effects on the electrical performance of electronic circuits and suggests innovative solutions. In this sense the present book represents a continua- tion and a supplement to the first book "Signal Propagation on Interconnects", Kluwer Academic Publishers, 1998. The papers in this book cover a wide area of research directions: Beneath the des- cription of general trends they deal with the solution of signal integrity problems, the modeling of interconnects, parameter extraction using calculations and measurements and last but not least actual problems in the field of optical interconnects.
出版日期Book 2000
關鍵詞Analysis; CMOS; FPGA; Field Programmable Gate Array; VLSI; computer-aided design (CAD); integrated circuit
版次1
doihttps://doi.org/10.1007/978-1-4615-4349-7
isbn_softcover978-1-4613-6954-7
isbn_ebook978-1-4615-4349-7
copyrightSpringer Science+Business Media Dordrecht 2000
The information of publication is updating

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A Testchip for Analysis of Signal Integrity and Ground-Bounce Effects in Deep-Submicron Technology,w challenges in keeping signal integrity on silicon and minimizing switching noise radiated from the IC and propagated into the exterior system. Since these effects are treated as ”parasitic“ and thus not covered by state-of-the-art design and simulation tools for VLSIs, the EMC team at Infineon Tec
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Considering Magnetic Interference in Board-Level Interconnect Design,work simulator is presented. The method is well-suited for many low-frequency applications and in particular for circuit layout optimization purposes. Field-to-circuit coupling is described focussing on topological properties of the problem. After the electrical network is decomposed into tree and c
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Advanced Modeling of Nonuniform Interconnects, based on a weak formulation of the Nonuniform Multiconductor Transmission Lines (NMTL) equations through expansion and testing with suitable basis functions sets. Depending on the choice of these basis functions, it is possible to tune the behavior of the numerical scheme to the form of the expecte
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