Titlebook: Higher Order Logic Theorem Proving and Its Applications; 6th International Wo Jeffrey J. Joyce,Carl-Johan H. Seger Conference proceedings 1

caldron

A functional approach for formalizing regular hardware structures,ut on regular hardware structures which are described by means of primitive recursion. PML-descriptions can easily be converted to syntactic structures, called hardware formulae, which can then be verified by the MEPHISTO system.

粗俗人

Alternative proof procedures for finite-state machines in higher-order logic,entable proof methods which do not use knowledge of fixpoint theorems are given. Since these methods are incomplete, the second category exploits an external program for computing fixpoint lemmata which can then be easily proved in HOL.

Aggrandize

A formalization of abstraction in LAMBDA,model only if they are satisfied in the model itself. We illustrate how the proof of an inductive step in the verification of a satisfaction relation for an infinite model can be reduced to the verification of a satisfaction relation for a very small finite model.

cavity

Report on the UCD microcoded Viper verification project, We redesigned Viper as a hierarchy of five interpreters, each of which is an instance of the generic interpreter. The top level specifies the Viper instruction set and the lowest level specifies an abstraction of a conventional electronic block model. The design and verification was carried out in approximately one person-year.

江湖郎中

0302-9743 umbia in August 1993. The workshop was sponsored by the Centre for Integrated Computer System Research. It was the sixth in the series of annual international workshops dedicated to the topic of Higher-Order Logic theorem proving, its usage in the HOL system, and its applications. The volume contain

LANCE

978-3-540-57826-0Springer-Verlag Berlin Heidelberg 1994

小蟲

Higher Order Logic Theorem Proving and Its Applications978-3-540-48346-5Series ISSN 0302-9743 Series E-ISSN 1611-3349

Introduction

噱頭

https://doi.org/10.1007/3-540-57826-9Automatisches Beweisen; Hardwareverifikation; Higher Order Logic System (HOL); Higher-Order-Logic Syste

過剩

Structure and behaviour in hardware verification,In this paper we review how hardware has been described in the formal hardware verification community. Recent developments in hardware description are evaluated against the background of the use of hardware description languages, and also in relation to programming languages. The notions of structure and behaviour are crucial to this discussion.