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Titlebook: Designing Correct Circuits; Workshop jointly org Geraint Jones,Mary Sheeran Conference proceedings 1991 Springer-Verlag London 1991 Digital

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樓主: nourish
41#
發(fā)表于 2025-3-28 15:12:05 | 只看該作者
https://doi.org/10.1007/978-1-4471-3544-9Digital systems; Formal methods; Hardware; Mathematica; Specification driven design; algebra; algorithms; c
42#
發(fā)表于 2025-3-28 21:54:30 | 只看該作者
43#
發(fā)表于 2025-3-29 00:02:02 | 只看該作者
44#
發(fā)表于 2025-3-29 04:39:12 | 只看該作者
45#
發(fā)表于 2025-3-29 10:02:25 | 只看該作者
Verification of Synchronous Concurrent Algorithms Using OBJ3: A Case Study of the Pixel-Planes Archel Planes archi?tecture which has been previously specified as a synchronous concurrent algorithm and has been manually verified. Our aim is to show that OBJ3 is a viable theorem proving tool for complex synchronous concurrent algorithms.
46#
發(fā)表于 2025-3-29 13:17:36 | 只看該作者
Use of the OTTER theorem prover for the formal verification of hardware,his paper deals with experiences in applying such a tool, OTTER, to the verification of correctness of combinational logic. Several proof methodologies are here discussed: a rewrite rules and a resolution based approach are compared.
47#
發(fā)表于 2025-3-29 16:09:09 | 只看該作者
48#
發(fā)表于 2025-3-29 22:36:51 | 只看該作者
Proof-based transformation of formal hardware models,ints on signals and for data conversion. Inserted into generic hardware models, the pseudo-components support modular data refinement of circuit descriptions and constraint propagation..Our methodology has been applied to the formal verification of a complex FIR-filter design using the proof system
49#
發(fā)表于 2025-3-29 23:58:17 | 只看該作者
50#
發(fā)表于 2025-3-30 07:18:42 | 只看該作者
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