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Titlebook: Constraining Designs for Synthesis and Timing Analysis; A Practical Guide to Sridhar Gangadharan,Sanjay Churiwala Book 2013 Springer Scienc

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書目名稱Constraining Designs for Synthesis and Timing Analysis
副標(biāo)題A Practical Guide to
編輯Sridhar Gangadharan,Sanjay Churiwala
視頻videohttp://file.papertrans.cn/236/235919/235919.mp4
概述Provides a hands-on guide to create constraints for synthesis and timing analysis, using Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.Explains fundamental
圖書封面Titlebook: Constraining Designs for Synthesis and Timing Analysis; A Practical Guide to Sridhar Gangadharan,Sanjay Churiwala Book 2013 Springer Scienc
描述This book serves as a hands-on guide to timing constraints in integrated circuit design.? Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly.? Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing.? Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.
出版日期Book 2013
關(guān)鍵詞ASIC; FPGA; Integrated Circuit Design; Placement and Routing; Static Timing Analysis; Synopsys Design Con
版次1
doihttps://doi.org/10.1007/978-1-4614-3269-2
isbn_softcover978-1-4899-8916-1
isbn_ebook978-1-4614-3269-2
copyrightSpringer Science+Business Media New York 2013
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requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.978-1-4899-8916-1978-1-4614-3269-2
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Constraining Designs for Synthesis and Timing AnalysisA Practical Guide to
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Constraining Designs for Synthesis and Timing Analysis978-1-4614-3269-2
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978-1-4899-8916-1Springer Science+Business Media New York 2013
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