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Titlebook: Architectures for Baseband Signal Processing; Frank Kienle Book 2014 Springer Science+Business Media New York 2014 Baseband Signal Process

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發(fā)表于 2025-3-21 19:05:39 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
期刊全稱Architectures for Baseband Signal Processing
影響因子2023Frank Kienle
視頻videohttp://file.papertrans.cn/162/161337/161337.mp4
發(fā)行地址Enables algorithm designers and chip designers to meet challenges posed by the ongoing increase of algorithmic complexity and required data throughput for today’s mobile applications.Describes techniq
圖書封面Titlebook: Architectures for Baseband Signal Processing;  Frank Kienle Book 2014 Springer Science+Business Media New York 2014 Baseband Signal Process
影響因子This book addresses challenges faced by both the algorithm designer and the chip designer, who need to deal with the ongoing increase of algorithmic complexity and required data throughput for today’s mobile applications. The focus is on implementation aspects and implementation constraints of individual components that are needed in transceivers for current standards, such as UMTS, LTE, WiMAX and DVB-S2. The application domain is the so called outer receiver, which comprises the channel coding, interleaving stages, modulator, and multiple antenna transmission. Throughout the book, the focus is on advanced algorithms that are actually in use .in modern communications systems. Their basic principles are always derived with a focus on the resulting communications and implementation performance.? As a result, this book serves as a valuable reference for two, typically disparate audiences in communication systems and hardware design.
Pindex Book 2014
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Gemischte Verhaltensstrategien,uction of turbo codes only a small group of researchers were interested in the field of iterative decoding, e.g. P. Elias [2], M. Tanner [3]. With the rise of turbo codes 1993 iterative decoding turned into focus again and thus LDPC codes were re-discovered in 1996 by MacKay and Neal [4].
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https://doi.org/10.1007/978-3-658-04320-9 used with large bit width to provide a high flexibility, e.g. 32 bit or 64 bit. For dedicated hardware design the data path and thus the computational units are optimized with respect to the given algorithm to be processed. The steps to derive a dedicated data path are:
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