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Titlebook: Architecture of Computing Systems - ARCS 2012; 25th International C Andreas Herkersdorf,Kay R?mer,Uwe Brinkschulte Conference proceedings 2

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發(fā)表于 2025-3-21 17:11:12 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
期刊全稱Architecture of Computing Systems - ARCS 2012
期刊簡(jiǎn)稱25th International C
影響因子2023Andreas Herkersdorf,Kay R?mer,Uwe Brinkschulte
視頻videohttp://file.papertrans.cn/162/161313/161313.mp4
學(xué)科分類Lecture Notes in Computer Science
圖書(shū)封面Titlebook: Architecture of Computing Systems - ARCS 2012; 25th International C Andreas Herkersdorf,Kay R?mer,Uwe Brinkschulte Conference proceedings 2
影響因子This book constitutes the refereed proceedings of the 25th International Conference on Architecture of Computing Systems, ARCS 2012, held in Munich, Germany, in February/March 2012.The 20 revised full papers presented in 7 technical sessions were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on robustness and fault tolerance, power-aware processing, parallel processing, processor cores, optimization, and communication and memory.
Pindex Conference proceedings 2012
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A Very Fast and Quasi-accurate Power-State-Based System-Level Power Modeling Methodology validate the accuracy of our methodology by comparing simulation results with measurements on a real mobile phone platform. Experimental results show that the simulated power profile matches very well with the measurements and it only takes about 100 . to simulate a 20 . GSM paging burst use case.
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0302-9743 Munich, Germany, in February/March 2012.The 20 revised full papers presented in 7 technical sessions were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on robustness and fault tolerance, power-aware processing, parallel processing, processor cores
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Admissibility of Function Spacese., an HSPA/LTE channel decoder. A profound analysis of the impact of timing and soft errors on the system behavior is presented. Dynamic techniques utilizing higher layers of communication systems to compensate these errors are proposed. This approach results in very low overhead for error resilience.
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A Case Study on Error Resilient Architectures for Wireless Communicatione., an HSPA/LTE channel decoder. A profound analysis of the impact of timing and soft errors on the system behavior is presented. Dynamic techniques utilizing higher layers of communication systems to compensate these errors are proposed. This approach results in very low overhead for error resilience.
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