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Titlebook: A Primer on Memory Consistency and Cache Coherence; Daniel J. Sorin,Mark D. Hill,David A. Wood Book 2011 Springer Nature Switzerland AG 20

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期刊全稱A Primer on Memory Consistency and Cache Coherence
影響因子2023Daniel J. Sorin,Mark D. Hill,David A. Wood
視頻videohttp://file.papertrans.cn/142/141912/141912.mp4
學科分類Synthesis Lectures on Computer Architecture
圖書封面Titlebook: A Primer on Memory Consistency and Cache Coherence;  Daniel J. Sorin,Mark D. Hill,David A. Wood Book 2011 Springer Nature Switzerland AG 20
影響因子Many modern computer systems and most multicore chips (chip multiprocessors) support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the architecturally visible behavior of its memory system. Consistency definitions provide rules about loads and stores (or memory reads and writes) and how they act upon memory. As part of supporting a memory consistency model, many machines also provide cache coherence protocols that ensure that multiple cached copies of data are kept up-to-date. The goal of this primer is to provide readers with a basic understanding of consistency and coherence. This understanding includes both the issues that must be solved as well as a variety of solutions. We present both highlevel concepts as well as specific, concrete examples from real-world systems. Table of Contents: Preface / Introduction to Consistency and Coherence / Coherence Basics / Memory Consistency Motivation and Sequential Consistency / Total Store Order and the x86 Memory Model / Relaxed Memory Consistency / Coherence Protocols / Snooping Cohere
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D. P. Winebrenner,D. G. Long,B. Holtenting the big picture of how coherence protocols work, and then show how to specify protocols in Section 6.2. We present one simple, concrete example of a coherence protocol in Section 6.3 and explore the protocol design space in Section 6.4.
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