Titlebook: Wide-Bandwidth High Dynamic Range D/A Converters; Konstantinos Doris,Arthu van Roermund,Domine Leena Book 2006 Springer-Verlag US 2006 Ana

debacle

Current Steering DACs, current sources), a current switching network controlled by the binary bits, and a resistor that converts the current to voltage. A new . bit word sets the switches in the corresponding on or off state. The switch network combines at the output node the corresponding current and creates the output

badinage

Dynamic limitations of Current Steering DACs,gh dynamic range DACs will be described by comparison with existing knowledge on DACs with high sampling rates and good low frequency linearity. This discussion will highlight the main contribution of the remaining chapters of this book.

滲透

Current Steering DAC circuit error analysis,exhibit nonlinear behavior. In this chapter the main problems, their nature and the signal errors they cause are investigated. Via the detailed explanation of the way errors are generated, some important properties will be recorded to prepare for the classification that follows in the next chapters.

Classify

High-level modeling of Current Steering DACs,t to its hierarchy of description from physics to abstract signals. The errors observed at the actual pulses of the DAC will be related to its parameters, signals, and circuit behavior in view of their relation with amplitude, time and space. The second issue concerns the properties of the errors. A

身體萌芽

開(kāi)頭

Functional analysis of local timing errors,curacies. The functional and some architectural issues of this error raised in chapter 5.2.5 will be addressed. Here the focus is on the DAC core hardware in relation to the properties of the errors and their relationship with the architectural parameters. The input signals are assumed sinusoidal.

Left-Atrium

Circuit analysis of local timing errors,of these errors with the circuit parameters and hidden signals of the DAC subcircuits. Second, a similar analysis at transistor level for some circuits will show the error generation mechanisms and the in-fluence of device properties and circuit topologies. Finally, circuit and functional analysis w

Perennial長(zhǎng)期的

全等

Design of a 12 bit 500 Msample/s DAC,formation of dominant error mechanisms for high frequencies. The DAC has 12 bits and operates up to 500 . with exceptionally good high frequency linearity at low power cost and silicon area. It is realized in a CMOS 0.18 . process.

逗它小傻瓜

Book 2006s encoding information in bits to signals encoding information in their amplitude vs. time domain characteristics. In general, they are parts of a larger system, the interface, which c- sists of several signal conditioning circuits. Dependent on where the converter is located within the chain of cir